1. Field of the Invention
The present invention is generally in the field of semiconductor fabrication. More particularly, the invention is in the field of isolation region formation in semiconductor substrates.
2. Background Art
Deep trench isolation regions can be formed to provide electrical isolation for electronic devices in a semiconductor die, such as, for example, electrical isolation for bipolar devices in a semiconductor die, where the die includes both bipolar and Complementary-Metal-Oxide-Semiconductor (CMOS) devices. A deep trench isolation region may also electrically isolate a bipolar transistor (i.e. a bipolar device) from adjacent bipolar transistors fabricated on the same semiconductor substrate. A deep trench isolation region can also be utilized, for example, to electrically isolate a collector of a bipolar transistor from neighboring regions of the substrate, thereby reducing collector-to-substrate capacitance. Deep trench isolation regions may be formed on a substrate after formation of, for example, field oxide isolation regions, a buried layer, and an epitaxial layer of silicon.
In a conventional deep trench isolation process flow, a trench can be formed in a semiconductor substrate and sidewalls and bottom surface of the trench can be lined with an oxide liner. A conformal layer of polycrystalline silicon (also referred to as polysilicon) can be deposited over the substrate so as to fill the trench. However, for a rectangular-shaped trench, a thick layer of polysilicon can be required to adequately fill the trench with polysilicon. However, depositing a thick layer of polysilicon can significantly reduce polysilicon fill process throughput and require more frequent deposition furnace cleaning as a result of increased polysilicon flaking, thereby increasing manufacturing cost.
Thus, there is a need in the art for providing an improved deep trench isolation process and region in a semiconductor substrate to, for example, increase throughput and reduce manufacturing cost.